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JEDEC Committee:
Memory Modules JC-45
The scope of JC-45 is to develop standards for DRAM modules, cards, and socket interfaces. These standards are to address architectural, electrical, test, and SPD issues relating to memory design and manufacturing for commercial applications.
Memory module is defined as a single or multiple PCBs that predominantly include multiple memory, logic, and passive devices in a planar or 3D layout for use with sockets.
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- JC-45 and Subcommittees
Recent Documents
Subcommittees
| Status (status) | ||
|---|---|---|
| JC-45.1 | Registered DIMM | |
| JC-45.2 | Unbuffered DIMM | |
| JC-45.3 | Small Modules | |
| JC-45.4 | Fully Buffered DIMM | |
| JC-45.5 | Module Interconnect |
Join JC-45
Interested in JC-45’s Memory Modules mission? Find out more about the benefits of JEDEC membership today.
Membership Information
Committee Meetings
| Toronto | 7 - 11 Jun 2010 |
| Denver | 13 - 17 Sep 2010 |
| San Francisco | 6 - 10 Dec 2010 |
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