The products within JC-42's scope include all memory integrated circuits and programmable logic devices, whether static or dynamic, without regard to their fabrication technology or application. Examples include large static and dynamic RAMs, ROMs, EEPROMs, and PLDs.
Activities include the development of technical information and standards pertaining to pinouts, operational characteristics including reading and writing algorithms, test parameters, characterization, and registration formats.
The committee maintains liaisons with other JEDEC committees and outside organizations to promote wide acceptance of the committee’s actions.
|HIGH BANDWIDTH MEMORY (HBM) DRAM||JESD235||Oct 2013|
|STANDARD MANUFACTURERS IDENTIFICATION CODE||JEP106AL||Oct 2013|
|GRAPHICS DOUBLE DATA RATE (GDDR5) SGRAM STANDARD||JESD212B||Sep 2013|
|LOW POWER DOUBLE DATA RATE 3 SDRAM (LPDDR3)||JESD209-3B||Aug 2013|
|NAND FLASH INTERFACE INTEROPERABILITY||JESD230A||Aug 2013|
|SERIAL FLASH DISCOVERABLE PARAMETERS (SFDP)||JESD216A||Jul 2013|
|LOW POWER DOUBLE DATA RATE 2 (LPDDR2)||JESD209-2F||Jun 2013|
|Addendum No. 1 to JESD79-3 - 1.35 V DDR3L-800, DDR3L-1066, DDR3L-1333, DDR3L-1600, and DDR3L-1866||JESD79-3-1A.01||May 2013|
|DDR4 SDRAM STANDARD||JESD79-4||Sep 2012|
|DDR3 SDRAM STANDARD||JESD79-3F||Jul 2012|
|JC-42.3B||DRAM Functions and Features|
|JC-42.4||Non-Volatile Memory Devices|
|JC-42.6||Low Power Memories|