JC-15 | JEDEC

Electrical and Thermal Characterization Techniques for Electronic Packages and Interconnects JC-15

Activities within JC-15’s scope include the standardization of thermal characterization techniques, both testing and modeling, for electronic packages, components, and materials for semiconductor devices.

Find JC-15’s complete scope in JM18: JEDEC Committee Scope Manual.

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Title	Document #	Date
GLOSSARY OF THERMAL MEASUREMENT TERMS AND DEFINITIONS	JESD51-13	Jun 2009
THERMAL MODELING OVERVIEW	JESD15	Oct 2008
COMPACT THERMAL MODEL OVERVIEW	JESD15-1	Oct 2008
DELPHI COMPACT THERMAL MODEL GUIDELINE	JESD15-4	Oct 2008
TWO-RESISTOR COMPACT THERMAL MODEL GUIDELINE	JESD15-3	Jul 2008
THERMAL TEST ENVIRONMENT MODIFICATIONS FOR MULTICHIP PACKAGES	JESD51-31	Jul 2008
INTEGRATED CIRCUITS THERMAL TEST METHOD ENVIRONMENTAL CONDITIONS - NATURAL CONVECTION (STILL AIR):	JESD51- 2A	Jan 2007
GUIDELINES FOR REPORTING AND USING ELECTRONIC PACKAGE THERMAL INFORMATION:	JESD51-12	May 2005
TEST BOARDS FOR THROUGH-HOLE AREA ARRAY LEADED PACKAGE THERMAL MEASUREMENT:	JESD51-11	Jun 2001
TEST BOARDS FOR AREA ARRAY SURFACE MOUNT PACKAGE THERMAL MEASUREMENTS:	JESD51- 9	Jul 2000

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Electrical and Thermal Characterization Techniques for Electronic Packages and Interconnects JC-15

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